1. Field of the Invention
The present invention relates generally to methods for forming metal-silicon layers within fabrications including but not limited to microelectronic fabrications. More particularly, the present invention relates to methods for forming, with enhanced compositional control, metal-silicon layers within fabrications including but not limited to microelectronic fabrications.
2. Description of the Related Art
Microelectronic fabrications are formed from microelectronic substrates over which are formed patterned microelectronic conductor layers which are separated by microelectronic dielectric layers.
As microelectronic fabrication integration levels have increased, and more particularly as semiconductor integrated circuit microelectronic fabrication integration levels have increased, there has evolved a continuing and correlating trend towards decreasing linewidth dimensions and thickness dimensions of microelectronic layers which are employed when fabricating microelectronic devices and microelectronic structures employed in fabricating microelectronic fabrications.
Of the microelectronic layers whose thicknesses have traditionally decreased when fabricating advanced microelectronic fabrications, and whose thickness uniformity and materials composition integrity is generally of considerable importance when fabricating microelectronic fabrications, are capacitive dielectric layers which are conventionally employed as: (1) gate dielectric layers within field effect transistors (FETs) within semiconductor integrated circuit microelectronic fabrications; as well as (2) capacitor plate separation dielectric layers within various types of capacitors within various types of microelectronic fabrications, including but not limited to semiconductor integrated circuit microelectronic fabrications.
While continuing decreases in thickness of capacitive dielectric layers are generally desirable in the art of microelectronic fabrication in order to theoretically provide enhanced performance of capacitive devices within advanced microelectronic fabrications, there nonetheless exist considerable technical barriers to forming, with both decreased thickness and enhanced compositional control, capacitive dielectric layers of conventional dielectric materials, such as silicon oxide dielectric materials, silicon nitride dielectric materials, silicon oxynitride dielectric materials and composites thereof, such as to provide enhanced performance of capacitive devices within advanced microelectronic fabrications, and in particular enhanced performance of capacitive devices within advanced semiconductor integrated circuit microelectronic fabrications.
In an effort to provide enhanced performance of capacitive devices within advanced microelectronic fabrications while avoiding decreased thicknesses of capacitive dielectric layers within the capacitive devices, there has been proposed in the alternative of employing conventional silicon oxide dielectric materials, silicon nitride dielectric materials, silicon oxynitride dielectric materials and composites thereof when forming capacitive dielectric layers within advanced microelectronic fabrication, to employ dielectric materials having generally higher dielectric constants, typically and preferably in a range of from about 10 to about 30 (in comparison with a range of from about 4 to about 8 for conventional silicon oxide dielectric materials, silicon nitride dielectric materials, silicon oxynitride dielectric materials and composites thereof). Such dielectric materials having generally higher dielectric constants allow for increased thicknesses of capacitive dielectric layers while simultaneously providing for enhanced capacitive properties of capacitive devices when fabricating microelectronic fabrications. Of the higher dielectric constant dielectric materials which have been proposed for use when forming capacitive dielectric layers within capacitive devices within advanced microelectronic fabrications, metal silicate dielectric materials and nitrided metal silicate dielectric materials (i.e., metal silicon oxynitride dielectric materials), are presently of considerable interest.
While metal silicate dielectric materials, and derivatives thereof, are thus desirable in the art of microelectronic fabrication for use when forming capacitive dielectric layers within capacitive devices within microelectronic fabrications, metal silicate dielectric materials, and derivatives thereof, are similarly nonetheless also not entirely without problems in the art of microelectronic fabrication when forming capacitive dielectric layers within capacitive devices within microelectronic fabrications. In that regard, it is often difficult to form a metal silicate dielectric material, or derivative thereof, with enhanced compositional control when forming a capacitive dielectric layer within a capacitive device within a microelectronic fabrication.
It is thus desirable in the art of microelectronic fabrication to provide methods and materials for forming, with enhanced compositional control, metal silicate dielectric materials, and derivatives thereof, for use when forming capacitive dielectric layers within capacitive devices within microelectronic fabrications.
It is towards the foregoing object that the present invention is directed.
Various methods and materials have been disclosed within various arts for forming capacitive dielectric layers, as well as other types of layers, with desirable properties within various types of fabrications.
For example, Russak et al., in xe2x80x9cReactive magnetron sputtered zirconium oxide and zirconium silicon oxide thin filmsxe2x80x9d, in J. Vac. Sci. Technol., A7(3), May/June 1989, pp. 1248-53, discloses a method for forming, with varying optical properties, zirconium silicate layers within optical fabrications. To realize the foregoing object, the method employs a reactive sputtering method employing separate zirconium and silicon targets which are independently sputtered within a single reactor chamber.
In addition, Wallace et al., in U.S. Pat. No. 6,013,553 and U.S. Pat. No. 6,020,243, disclose various methods for forming, for use within a field effect transistor (FET) within a semiconductor integrated circuit microelectronic fabrication, a gate dielectric layer formed of a dielectric material having a comparatively high dielectric constant. To realize the foregoing object, the method employs any. of several deposition methods which may be employed to form the gate dielectric layer of a comparatively high dielectric constant dielectric material selected from the group consisting of hafnium oxynitride dielectric materials, zirconium oxynitride dielectric materials, hafnium silicon oxynitride dielectric materials and zirconium silicon oxynitride dielectric materials.
Finally, Laibowitz et al., in U.S. Pat. No. 6,088,216, disclose an alternative method for forming, for use within a capacitor within a dynamic random access memory (DRAM) cell within a semiconductor integrated circuit microelectronic fabrication, a capacitor plate separation dielectric layer formed of a dielectric material having a comparatively high dielectric constant. To realize the foregoing object, the method employs an ion implantation method through which the capacitor plate separation dielectric layer may be formed of a comparatively high dielectric constant silicate dielectric material such as a barium silicate dielectric material, a lead silicate dielectric material or a composite silicate dielectric material thereof.
Desirable in the art of microelectronic fabrication are additional methods and materials which may be employed for forming, with enhanced compositional control, metal silicate dielectric materials, and derivatives thereof, for use when forming capacitive dielectric layers within capacitive devices within microelectronic fabrications.
It is towards the foregoing object that the present invention is directed.
A first object of the present invention is to provide a method for forming a metal silicate dielectric layer within a microelectronic fabrication.
A second object of the present invention is to provide a method in accord with the first object of the present invention, wherein the metal silicate dielectric layer is formed with enhanced compositional control.
A third object of the present invention is to provide a method in accord with the first object of the present invention and the second object of the present invention, wherein the method is readily commercially implemented.
In accord with the objects of the present invention, there is provided by the present invention a method for forming a metal-silicon layer. To practice a first embodiment of the method of the present invention, there is first provided a reactor chamber. There is then positioned within the reactor chamber a substrate spaced from a metal source target. There is also provided within the reactor chamber a minimum of a sputter material and a reactive silicon material. There is then sputtered the metal source target positioned within the reactor chamber with the sputter material provided within the reactor chamber in the presence of the reactive silicon material provided within the reactor chamber to form a metal-silicon layer over the substrate.
The present invention also contemplates a second embodiment of the present invention wherein when forming a metal-silicon layer: (1) instead of positioning and sputtering within the reactor chamber the metal source target there is positioned and sputtered within the reactor chamber a silicon source target; and (2) instead of providing within the reactor chamber the reactive silicon material when sputtering within the reactor chamber the metal source target there is provided within the reactor chamber a reactive metal material when sputtering within the reactor chamber the silicon source target.
Thus, in general, the present invention provides when forming a metal-silicon layer over a substrate: (1) a source target selected from one of a metal source target and a silicon source target; and (2) a complementary reactive material selected from one of a reactive silicon material and a reactive metal material.
The present invention provides a method for forming a metal silicate dielectric layer within a microelectronic fabrication, wherein the metal silicate dielectric layer is formed with enhanced compositional control. The present invention realizes the foregoing object by employing when forming a metal-silicon layer over a substrate which may be employed within a microelectronic fabrication, wherein the metal-silicon layer may comprise a metal silicate dielectric layer formed over the substrate which may be employed within the microelectronic fabrication, a reactive sputtering method which employs in a first embodiment a sputtering of a metal source target positioned within a reactor chamber within which is also positioned the substrate spaced from the metal source target, where the reactive sputtering method is undertaken with a sputter material provided within the reactor chamber in the presence of a reactive silicon material provided within the reactor chamber. Within the context of the first embodiment of the present invention, by adjusting a sputter material concentration provided within the reactor chamber within the context of a reactive silicon material concentration provided within the reactor chamber, the metal-silicon layer, which may comprise the metal silicate dielectric layer, may be formed with enhanced compositional control.
The method of the present invention is readily commercially implemented. The present invention employs methods and materials as are otherwise generally known in the art of microelectronic fabrication, but employed within the context of specific process limitations to provide the present invention. Since it is thus a specific set of process limitations which provides at least in part the present invention, rather than the existence of methods and materials which provides the present invention, the method of the present invention is readily commercially implemented.